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| Desired Industry: Engineering |
SpiderID: 22279 |
| Desired Job Location: chennai, Indiana |
Date Posted: 8/23/2008 |
| Type of Position: Full-Time Permanent |
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| Job Level: Experienced with over 2 years experience |
Willing to Travel: Yes, 25-50% |
| Highest Degree Attained: Bachelors |
Willing to Relocate: Yes |
Objective:
To work in an organization that will utilize and enhance my skill sets in the filed of , CMOS IC circuit design, layout and ASIC/FPGA Design/Verification and applications.
Experience:
„X Proficient in RTL design, simulation and synthesis using Xilinx ISE, XST tools.
„X Experience in Hard/Soft Processors, Processor IP development, bus interface development, embedded design tools.
„X Experienced with Xilinx EDK Platform .
„X Experienced in customize EDK design.
„X Experienced in VHDL, Xilinx Spartan FPGA programming.
„X Knowledgeable in CMOS VLSI design,Verilog RTL coding.
„X Knowledgeable in ASIC front end/back end design
„X Knowledgeable in Physical design flow.
„X Experience in Simulation, Synthesis, MAP and Place & Route.
„X Designed and Verification of communication protocol(I2C,RS232,RS485,SPI) standard implementations on Xilinx FPGAs.
„X Design and implementation of high end embedded architecture using Micoblaze/PowerPC.
Education:
Bachelor of Engineering(Electronics & communication)
Noorul Islam College of Engineering , Nagercoil , India June 2004
Skills:
Layout Tools:
• Microwind Nano Lamda Layout Editor,
• DSCH3 Schematic Composer,
• VirtuosoFab 3-D fabrication process simulator,
• PROthumb Mixed signal simulation and analysis.
VLSI Tools:
• Quartus II,Xilinx ISE ,Xilinx Platform Studio.
Additional Information:
Design and development of various HDL modules using Xilinx Virtex II Pro FPGA board
Xilinx FPGA board programming using ISE, EDK
Design HDL modules using Xilinx IP cores, MicroBlaze, PowerPC processor
Design logic level and physical layout verification using Microwind.
Candidate Contact Information:
| Name: sahul hameed |
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